1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and more particularly, to an array panel for a liquid crystal display device and a method of manufacturing the same.
2. Discussion of the Related Art
A flat panel display device has been widely used because it is thin and light in weight and requires low power consumption. The flat panel display device may be classified into two types by light emission. One is a light-emitting display device that emits light to display images and the other is a light-receiving display device that uses an external light source to display images. Plasma display panels (PDPs), field emission display (FED) Devices and electro luminescence (EL) display devices are examples of the light-emitting display devices and a liquid crystal display (LCD) device is an example of the light-receiving display device. The liquid crystal display device has been widely used for notebook computers and desktop monitors, etc. because of its superior resolution, color image display, and quality of displayed images.
Generally, the liquid crystal display (LCD) device has upper and lower substrates, which are spaced apart and facing into each other. Electrodes formed on the substrates are facing each other. A liquid crystal is interposed between the upper substrate and the lower substrate. A voltage is applied to the liquid crystal through the electrodes of each substrate, and thus an alignment of the liquid crystal molecules is changed according the applied voltage to display images. Because the liquid crystal display device does not emit light as described above, it needs a light source to display images. Accordingly, the liquid crystal display device has a backlight behind a liquid crystal panel as a light source. An amount of light incident from the backlight is controlled according the alignment of the liquid crystal molecules to display images.
An active matrix LCD device, which has pixels in a matrix type, has been widely used because of high resolution and fast moving images. An array panel of the active matrix LCD device includes a plurality of thin film transistors (TFTs) and a plurality of pixel electrodes, each of which connects with each of TFTs.
The array panel for a conventional active matrix liquid crystal display device will be described hereinafter in detail with reference to FIGS. 1 and 2.
FIG. 1 is a plane view of an array panel for a conventional LCD device, and FIG. 2 is a cross-sectional view along line II-II of FIG. 1. In FIGS. 1 and 2, the array panel includes a transparent substrate 10, and a gate line 21 and a gate electrode 22 are formed on the substrate 10. The gate line 21 is extended horizontally and the gate electrode 22 is connected to the gate line 21. A gate insulating layer 30 covers the gate line 21 and the gate electrode 22. An active layer 41 and an ohmic contact layer 51 and 52 are formed on the gate insulating layer 30 in this order. A data line 61, a source electrode 62, and a drain electrode 63 are formed on the ohmic contact layer 51 and 52. Also, a capacitor electrode 65, which is made of the same material as the data line 61, is formed on the gate insulator 30. The data line 61 is perpendicular to the gate line 21, and the source electrode 62 is connected to the data line 61. The source and drain electrodes 62 and 63 are spaced apart from each other on the gate electrode 22. The capacitor electrode 65 overlaps a portion of the gate line 21, and then a storage capacitor is obtained by forming the capacitor electrode 65 and the overlapped gate line 21.
A passivation layer 70 covers the data line 61, the source electrode 62, the drain electrode 63, and the capacitor electrode 65. The passivation layer 70 has a first contact hole 71 and a second contact hole 72 that expose the drain electrode 63 and the capacitor electrode 65, respectively.
A pixel electrode 81 is formed on the passivation layer 70. The pixel electrode 81 is disposed at the pixel area where the gate line 21 and the data line 61 are crossed to each other. Also, the pixel electrode 81 is connected to the drain electrode 62 and the capacitor electrode 65 through the first and second contact hole 71 and 72, respectively.
FIGS. 3A to 3E illustrate a manufacturing process of an array panel for the conventional LCD device, and are cross-sectional views corresponding to line II-II of FIG. 1.
FIG. 3A shows the first step of manufacturing the array panel for the conventional LCD device. In FIG. 3A, a gate line 21 and a gate electrode 22 are formed on a substrate 10 by depositing a metal material on the substrate 10 and patterning the metal material by the first mask.
FIG. 3B illustrates the next step of manufacturing the array panel for the conventional LCD device. In FIG. 3B, a gate insulating layer 30, an amorphous silicon layer and an doped amorphous silicon layer are deposited on the substrate 10 including the gate line 21. The amorphous silicon layer and the doped amorphous silicon layer are etched in a photolithography process using the second mask. Then, an active layer 41 and a doped semiconductor layer 53 are formed thereon.
FIG. 3C shows the step of forming a data line of the array panel for the conventional LCD device. In FIG. 3C, a metal layer is deposited on the substrate 10 including the active layer 41 and the doped semiconductor layer 53, and patterned by the third mask. Therefore, a data line 61 (shown in FIG. 1), a source electrode 62, a drain electrode 63, and a capacitor electrode 65 are formed thereon. Next, the doped semiconductor layer 53, which is exposed between the source electrode 62 and the drain electrode 63, is etched. An ohmic contact layer 51 and 52 is then completed in this step.
FIG. 3D shows the step of forming a passivation layer of the array panel for the conventional LCD device. In FIG. 3D, a passivation layer 70 is formed to cover the data line 61, the source electrode 62, the drain electrode 63, and the capacitor electrode 65. And, the passivation layer 70 is etched using the fourth mask. Therefore, the passivation layer 70 has a first contact hole 71 and a second contact hole 72. The first contact hole 71 and the second contact hole 72 expose the drain electrode 63 and the capacitor electrode 65, respectively.
FIG. 3E illustrates the step of forming a pixel electrode of the array panel for the conventional LCD device. In FIG. 3E, a transparent conductive material is deposited on the passivation layer 70 and etched using the fifth mask, and then a pixel electrode 81 is formed. The pixel electrode 81 is connected to the drain electrode 63 and the capacitor electrode 65 through the first and second contact holes 71 and 72, respectively.
As described above, the array panel for the conventional LCD device is fabricated through the photolithography processes using five masks. The photolithography process includes several steps of cleaning, coating a photo-resist layer, exposing through a mask, developing the photo-resist layer, and etching. Therefore, fabricating time, costs, and failure may be decreased by reducing the number of the photolithography process.